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[OtherVHDL_book

Description: VHDL实用教程 潘松王国栋 电子科技大学出版社;本书比较详细的介绍了VHDL语言现象和实用技术,全书以实用和操作为基本点。简解而完整的介绍了VHDL知识-VHDL Practical Guide PAN Song Wang Guodong University of Electronic Science and Technology Publishing House; The book detailed introduction to the phenomenon of VHDL and practical skills, and practical book to operate as a basic point. Jane solutions, and complete knowledge of VHDL
Platform: | Size: 12488081 | Author: 王迪 | Hits:

[OtherVHDL_book

Description: VHDL实用教程 潘松王国栋 电子科技大学出版社;本书比较详细的介绍了VHDL语言现象和实用技术,全书以实用和操作为基本点。简解而完整的介绍了VHDL知识-VHDL Practical Guide PAN Song Wang Guodong University of Electronic Science and Technology Publishing House; The book detailed introduction to the phenomenon of VHDL and practical skills, and practical book to operate as a basic point. Jane solutions, and complete knowledge of VHDL
Platform: | Size: 12487680 | Author: 王迪 | Hits:

[assembly languagerili

Description: 系统功能 带有约会提醒功能的电子日历,具体功能如下: 1、输入起始日期(年月日)、以天为单位计时,数码管显示年月日。 2、能够区分大小月不同的天数并根据年份判断是否为闰二月。 3、可以输入一个日期并开启提醒功能,到时会有警鸣声提醒直到拨动某一特定开关表示已知。 -System function with a date electronic calendar to remind function, specific functions are as follows: 1, enter the start date (year, month and day) to days as a unit time, digital tube display date. 2, able to distinguish between the size of the number of days in different months and years to determine whether the basis of February for the leap. 3, you can enter a date and open the reminder function, there can be a song to remind the police until a specific DIP switches are known to express.
Platform: | Size: 7168 | Author: 徐民 | Hits:

[VHDL-FPGA-VerilogVHDL-pansong

Description: VHDL实用教程(潘松),非常经典讲解VHDL语言,包含基本语法及实例。-VHDL Practical Guide (Pan Song), is a classic on the VHDL language, including basic grammar and examples.
Platform: | Size: 4752384 | Author: 辛小怡 | Hits:

[VHDL-FPGA-VerilogHW_songer_tiexuedanxin

Description: 用VHDL编写的播放器,播放射雕英雄传主题曲之《铁血丹心》,另附编码表WORD档-Using VHDL prepared player, the player shooting Heroes theme song of
Platform: | Size: 7168 | Author: 王冰 | Hits:

[VHDL-FPGA-VerilogHW_songer_yijianmei

Description: 用VHDL编写的播放器,播放一剪梅主题曲之《一剪梅》,另附编码表WORD档-Using VHDL prepared player,一剪梅play the theme song of
Platform: | Size: 8192 | Author: 王冰 | Hits:

[VHDL-FPGA-Verilogsong

Description: 音乐,梁祝,其中应用VHDL编写的全过程梁祝。-Music, Butterfly Lovers, in which the application of VHDL to prepare the whole process of Butterfly Lovers.
Platform: | Size: 1024 | Author: 1 | Hits:

[VHDL-FPGA-VerilogFPGA

Description: 自行选取四首乐曲的一部分,采用VHDL语言层次化和模块化的设计方法, 实现多首乐曲演奏电路的设计 -4 to select the part of music, the use of VHDL language and modular hierarchical design methodology, multi-song concert circuit design
Platform: | Size: 166912 | Author: 赵新歌 | Hits:

[VHDL-FPGA-Verilogsong

Description: 用EDA技术实现音乐的自动播放,此源代码用的是VHDL语言,-EDA technology with automatic music player, the source code using the VHDL language,
Platform: | Size: 1024 | Author: 枯在 | Hits:

[VHDL-FPGA-VerilogVHDL

Description: VHDL实用教程电子版,由潘松、王国栋编著,李广军审校,该书是VHDL入门的好帮手。-Practical VHDL Tutorial electronic version, from Pan Song, Wang Guodong edited, LI Guang-jun revision, the book is a good helper VHDL entry.
Platform: | Size: 16303104 | Author: 宋晓光 | Hits:

[VHDL-FPGA-Verilogsong

Description: module song(clk,key,song_out,led) input [7:0] key input clk output song_out output [7:0] led reg song_reg reg [21:0] count reg [19:0] delay reg [7:0] key_reg always @(posedge clk) begin count=count+1 if((count==delay)&(!(delay==20 d65535))) begin count=22 d0 song_reg=!song_reg end end always @(key) begin key_reg=key case(key_reg) 8 b0000_0001: delay=20 d47774 //zhong yin 1 523.3HZ 8 b0000_0010: delay=20 d42568 //zhong yin 2 587.3HZ 8 b0000_0100: delay=20 d37919 //zhong yin 3 659.3HZ 8 b0000_1000: delay=20 d35791 //zhong yin 4 698.5HZ 8 b0001_0000: delay=20 d31888 //zhong yin 5 784HZ 8 b0010_0000: delay=20 d28409 //zhong yin 6 880HZ 8 b0100_0000: delay=20 d25309 //zhong yin 7 987.8HZ 8 b1000_0000: delay=20 d23889 //gao yin 1 1046.5HZ default: delay=20 d65535 endcase end assign song_out=song_reg 文件: song.rar 大小: 357KB 下载: 下载 assign led=key_reg endmodule -module song (clk, key, song_out, led) input [7:0] key input clk output song_out output [7:0] led reg song_reg reg [21:0] count reg [19:0 ] delay reg [7:0] key_reg always @ (posedge clk) begin count = count+1 if ((count == delay )& (!( delay == 20' d65535))) begin count = 22 ' d0 song_reg =! song_reg end end always @ (key) begin key_reg = key case (key_reg) 8' b0000_0001: delay = 20' d47774 // zhong yin 1 523.3HZ 8' b0000_0010: delay = 20' d42568 // zhong yin 2 587.3HZ 8' b0000_0100: delay = 20' d37919 // zhong yin 3 659.3HZ 8' b0000_1000: delay = 20' d35791 // zhong yin 4 698.5HZ 8' b0001_0000: delay = 20' d31888 // zhong yin 5 784HZ 8' b0010_0000: delay = 20' d28409 // zhong yin 6 880HZ 8' b0100_0000: delay = 20' d25309 // zhong yin 7 987.8HZ 8' b1000_0000: delay = 20' d23889 // gao yin 1 1046.5HZ default: delay = 20' d65535 endcase end assign song_out = song_reg file: song.rar Size: 357KB Download: Download
Platform: | Size: 365568 | Author: 罗仲景 | Hits:

[VHDL-FPGA-Verilogbeep

Description: 在Cyclon II EP2C5T144上实现蜂鸣器演奏歌曲-In Cyclon II EP2C5T144 play the song on the realization of the buzzer
Platform: | Size: 2038784 | Author: 东东 | Hits:

[VHDL-FPGA-Verilogplay-a-song

Description: 通过VHDL编程,控制下位机播放歌曲梁祝。-Through the VHDL program, under the control of the crew playing the song Butterfly.
Platform: | Size: 2048 | Author: William | Hits:

[VHDL-FPGA-Verilogsong

Description: 基于VHDL语言编写的源程序,实现用蜂鸣器演奏歌曲《友谊天长地久》-VHDL language based on the source, implemented by the buzzer play the song " friendship forever"
Platform: | Size: 2048 | Author: 张帝 | Hits:

[VHDL-FPGA-VerilogVHDL

Description: VHDL实用教程,潘松,讲述VHDL较好的一本教材,读者评价较高。-VHDL practical tutorials, Pan Song, about VHDL good a textbook, readers rate higher.
Platform: | Size: 2892800 | Author: wuhongyuan | Hits:

[VHDL-FPGA-Verilogsonger

Description: 著名歌曲《十送红军》音乐发生器在FPGA上实现-The famous song " Shisonghongjun" music generator in the FPGA
Platform: | Size: 4096 | Author: longjiezhong | Hits:

[VHDL-FPGA-Verilogsong-play

Description: 本文作者创新点是基于FPGA完成乐曲演奏电路,在Altera Quartus II 环境下,用VHDL 语言实现电子琴演奏音乐的设计实例,设计者根据VHDL的语法规则,对系统的逻辑行为进行描述,然后通过综合工具进行电路结构的综合、编译、优化,用仿真,可在短时间内设计出高效、稳定、符合设计要求的电路。-This innovation is the author of music to play based on FPGA to complete the circuit, the Altera Quartus II environment, using VHDL language keyboard to play music, design examples, the designer according to grammatical rules of VHDL, the logic behavior of the system description, and then through an integrated tool for integrated circuit structure, compile, optimize, with simulation, can be designed in a short time efficient, stable, consistent with the design requirements of the circuit.
Platform: | Size: 151552 | Author: wangwenhao | Hits:

[VHDL-FPGA-VerilogVHDL-based-music-player-design

Description: 为本人2012年下学期的EDA大作业,含 设计文档 和 源代码。所设计的系统在网上很难找到(当时我就没找到,特别是源码),二本系统又具有一定的实用性,只要在ROM中存储不同的歌曲编码,即可播放不同的乐曲。 文章详细介绍了“具有自动乐曲演奏功能的电子琴”的FPGA设计原理与方法,使用了ROM存储音符和节拍,矩阵键盘控制整个系统。 源码注释清楚,容易理解。 欢迎访问我的博客:http://blog.csdn.net/enjoyyl-For the I semester of 2012 EDA large operations, including design documentation and source code. The designed system is difficult to find online (at that time I did not find, in particular, is the source), two systems but also has a certain practicality, as long as different songs stored in the ROM code, you can play a different song. Article details " function with automatic music playing piano," the FPGA design principles and methods, the use of ROM storage notes and beats, matrix keyboard to control the entire system. Source notes clear and easy to understand. Welcome to my blog: http://blog.csdn.net/enjoyyl
Platform: | Size: 4927488 | Author: 刘志 | Hits:

[e-languageVHDL

Description: 将音乐数据存储到LPM-ROM,就达到了以纯硬件的手段来实现乐曲的演奏效果。只要修改LPM-ROM所存储的音乐数据,将其换成其他乐曲的音乐数据,再重新定制LPM-ROM,连接到程序中就可以实现其它乐曲的演奏。-oring music data to LPM-ROM, reached with pure hardware means to achieve the effect of music playing. Just modify LPM-ROM music stored data, which is replaced by another song of the music data, and then re-customize LPM-ROM, connected to the program can be achieved in other music playing.
Platform: | Size: 987136 | Author: 李永科 | Hits:

[VHDL-FPGA-VerilogSong-playback-circuit-design-VHDL

Description: 乐曲播放电路VHDL设计 附仿真报告、顶层文件和源程序-Song playback circuit design VHDL simulation report attached, and the top-level source file
Platform: | Size: 440320 | Author: | Hits:
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